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Alexander Nutz
2025-08-29 15:28:30 +02:00
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<!doctype html><title>The making of the favicon</title><meta charset=utf-8><body><div><p><br><h1>The making of the favicon</h1><p><span style=font-size:9pt><p>Last modified: 26. July 2025 15:04 (Git #<code><code style=white-space:pre-wrap>c80eb6ef</code></code>)<p>Written by <a href=https://alex.vxcc.dev>alex_s168</a></span></div><div><p><br>The favicon of my website currently is:</p><img alt=image src=res/favicon.png style=width:38%></div><div><br>This represents an <a href=https://www.sciencedirect.com/science/article/pii/S0890540197926432>interaction combinator</a> tree, that can be interpreted as a <a href=https://en.wikipedia.org/wiki/Lambda_calculus>lambda calculus</a> expression.</div><div><p><br><h2>Step 0: Designing the Circuit</h2><p>I ended up with this:</p><img alt=image src=res/article-favicon/step0.png style=width:32%><p>(this is the second attempt at layouting the circuit)</div><div><p><br><h2>Step 1: Sketching</h2><p>While starting doing this, I realised that one wire always overlaps with one node triangle, unless I cheated. Here is a visual representation of this (inaccurate):</p><img alt=image src=res/article-favicon/step1_0.png style=width:18%><p><br>This means that I have to modify the layouting from step 0 a bit, which is unfortunate, but in retrospect, I think that it makes the result look better:</p><img alt=image src=res/article-favicon/step1_1.png style=width:25%><p><br>That however takes up too much space, so I did another variation:</p><img alt=image src=res/article-favicon/step1_2.png style=width:25%><p><br>I also did another variation here, but decided to not use that.</div><div><p><br><h2>Step 2: Preparation for coloring</h2><p>I colored the back side of the piece of paper which contains the sketeches with a pencil, put a white piece of paper behind it, and then re-traced the line, to get a lighter version of the sketch onto the white paper.</p><img alt=image src=res/article-favicon/step2.png style=width:25%><p><br>Then I used modern technology (a copier) to copy that piece of paper multiple times, and also scale it up (to allow for more details).</div><div><p><br><h2>Step 3: Coloring</h2><p>It was a disaster…</p><img alt=image src=res/article-favicon/step3_0.png style=width:70%><p><br></p><img alt=image src=res/article-favicon/step3_1.png style=width:70%><p><br>Some variants actually look nice, but only parts of it.</div><div><p><br><h2>Step 4: Outsourcing the coloring</h2><p>After some time, I just gave up, and decided to ask my sister for help…</p><img alt=image src=res/article-favicon/step4_0.png style=width:70%><p><br>I only told her (translated):<p><code><pre><code>Can you please color this?<br>It's supposed to be a circuit, and it will be a small logo for a website.<br>The website is mainly black and white, but this (context: persian blue) blue would work too.</code></pre></code><p>And less than half a minute later, she came up with this:</p><img alt=image src=res/article-favicon/step4_1.png style=width:38%><p><br>We considered that the logo will end up being quite small, so “we” wanted it to look good when zoomed out. This is a pretty nice idea, because the different colored wires end up blending together nicely.<p><br>I put that into the scanner, and meanwhile she experimented with different filling styles.<p><br>Then she came up with this (the final version):</p><img alt=image src=res/article-favicon/step4_2.png style=width:38%><p>Filling the drawing only took her about 20 seconds!</div><div><p><br><h2>Step 5: Digital Modifications</h2><p>As last step, I removed some of the sketch lines and some minor imperfections digitally.</div><div><p><br><h2>Conclusion</h2><p>I like the final result a lot (as small logo), but it’s a bit too detailed as favicon.<p>I will re-visit this topic in the future.</div>

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<!doctype html><title>etc-nand</title><meta charset=utf-8><meta content="width=device-width,initial-scale=1" name=viewport><link href=res/favicon.png rel=icon sizes=512x512><link href=res/favicon.png rel=image_src type=image/png><link title="alexs168's blog" href=atom.xml rel=alternate type=application/atom+xml><body><style>@font-face{font-family:DejaVu Sans Mono;src:local(DejaVu Sans Mono),url(res/DejaVuSansMono.woff2)format("woff2"),local(Courier New),local(Courier),local(monospace);font-weight:400;font-style:normal;font-display:swap}body{font-family:DejaVu Sans Mono;font-size:10pt}td{vertical-align:top;width:100%;display:inline}h1,h2,h3,h4{margin-top:1%;margin-bottom:.75%}p{margin-top:.75%;margin-bottom:.75%}ul{margin-top:0%}.current{font-weight:700}pre{margin-top:0;margin-bottom:0;display:inline}a,a:visited{color:#3f51b5;text-decoration:none}</style><div><p><br><h1>etc-nand</h1></div><div><p><br><span style=text-decoration:underline><h2>Overview</h2></span><p>etc-nand is a real-world <a href=https://github.com/ETC-A/etca-spec/>ETC.A</a> CPU built from almost only quad NAND gate ICs (74hc00)<p>It will probably be finished in a few months.</div><div><p><br><span style=text-decoration:underline><h3>Estimates</h3></span><p>Estimated gate count:<ul><li>2800 NAND gates<li>320 tristate buffers</ul><p><br> Estimated component counts:<ul><li>700x 74hc00 quad NAND gates<li>40x 74HC54 octal tristate buffers<li>a few simple resistors</ul></div><div><p><br><span style=text-decoration:underline><h3>Planned Specifications</h3></span> ETC.A base instruction set + byte operations + S&F + Von Neumann<p>The CPU will communicate with peripherals over a 16 bit data + 15 bit address memory bus</div><div><p><br><span style=text-decoration:underline><h2>Purchase</h2></span> You will be able to purchase one in the future.<p>Stay tuned!</div><div><br><span style=text-decoration:underline><h2>Images</h2></span> Images of PCBs that are either already manifactured or currently beeing manifactured by JLCPCB.</div><div><p><br><span style=text-decoration:underline><h3>16 bit register</h3></span></p><img src=res/etc-nand/reg16_front.png style=width:100%></div><div><p><br><span style=text-decoration:underline><h3>8 bit ALU slice</h3></span> A <a href=#add8>8 bit adder module</a> will be placed in the middle</p><img src=res/etc-nand/alu8_front.png style=width:100%></div><div><p><br><span id=add8 style=text-decoration:underline><h3>8 bit adder</h3></span></p><img src=res/etc-nand/add8_front.png style=width:100%></div><script>var gotoVariant=(a=>{window.location.href=window.location.href.replace(/\.\w+.html/g,a)});window.addEventListener(`beforeprint`,a=>{gotoVariant(`.min.pdf`)})</script><script async src=coffee.js></script>

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<!doctype html><title>etc-nand</title><meta charset=utf-8><body><div><p><br><h1>etc-nand</h1></div><div><p><br><h2>Overview</h2><p>etc-nand is a real-world <a href=https://github.com/ETC-A/etca-spec/>ETC.A</a> CPU built from almost only quad NAND gate ICs (74hc00)<p>It will probably be finished in a few months.</div><div><p><br><h3>Estimates</h3><p>Estimated gate count:<ul><li>2800 NAND gates<li>320 tristate buffers</ul><p><br> Estimated component counts:<ul><li>700x 74hc00 quad NAND gates<li>40x 74HC54 octal tristate buffers<li>a few simple resistors</ul></div><div><p><br><h3>Planned Specifications</h3><p>ETC.A base instruction set + byte operations + S&F + Von Neumann<p>The CPU will communicate with peripherals over a 16 bit data + 15 bit address memory bus</div><div><p><br><h2>Purchase</h2><p>You will be able to purchase one in the future.<p>Stay tuned!</div><div><p><br><h2>Images</h2><p>Images of PCBs that are either already manifactured or currently beeing manifactured by JLCPCB.</div><div><p><br><h3>16 bit register</h3><img src=res/etc-nand/reg16_front.png style=width:100%></div><div><p><br><h3>8 bit ALU slice</h3><p>A <a href=#add8>8 bit adder module</a> will be placed in the middle</p><img src=res/etc-nand/alu8_front.png style=width:100%></div><div><p><br><h3 id=add8>8 bit adder</h3><img src=res/etc-nand/add8_front.png style=width:100%></div>

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