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website-build/build/project-etc-nand.typ.nano.html
2025-08-29 15:28:30 +02:00

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<!DOCTYPE html>
<html>
<head>
<title>etc-nand</title>
<meta charset="utf-8">
</head>
<body>
<div style="
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<p><br></p>
<h1>etc-nand</h1>
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<div style="
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<p><br></p>
<h2>Overview</h2>
<p>etc-nand is a real-world <a href="https://github.com/ETC-A/etca-spec/">ETC.A</a> CPU built from almost only quad NAND gate ICs (74hc00)</p>
<p>It will probably be finished in a few months.</p>
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<p><br></p>
<h3>Estimates</h3>
<p>Estimated gate count:</p>
<ul>
<li>2800 NAND gates</li>
<li>320 tristate buffers</li>
</ul>
<p><br>
Estimated component counts:</p>
<ul>
<li>700x 74hc00 quad NAND gates</li>
<li>40x 74HC54 octal tristate buffers</li>
<li>a few simple resistors</li>
</ul>
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<div style="
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<p><br></p>
<h3>Planned Specifications</h3>
<p>ETC.A base instruction set + byte operations + S&amp;F + Von Neumann</p>
<p>The CPU will communicate with peripherals over a 16 bit data + 15 bit address memory bus</p>
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<p><br></p>
<h2>Purchase</h2>
<p>You will be able to purchase one in the future.</p>
<p>Stay tuned!</p>
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<p><br></p>
<h2>Images</h2>
<p>Images of PCBs that are either already manifactured or currently beeing manifactured by JLCPCB.</p>
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<p><br></p>
<h3>16 bit register</h3>
<img src="res/etc-nand/reg16_front.png" style="width:100%;">
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<p><br></p>
<h3>8 bit ALU slice</h3>
<p>A <a href="#add8">8 bit adder module</a> will be placed in the middle</p>
<img src="res/etc-nand/alu8_front.png" style="width:100%;">
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<p><br></p>
<h3 id="add8">8 bit adder</h3>
<img src="res/etc-nand/add8_front.png" style="width:100%;">
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</body>
</html>