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87 lines
1.6 KiB
Typst
87 lines
1.6 KiB
Typst
#import "../common.typ": *
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#import "../simple-page-layout.typ": *
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#import "../components/pcb-view.typ": *
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#import "../components/header.typ": *
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#let pcb-size-percent = 80
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#let qpcb(file) = {
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let p = res-path()+"etc-nand/"+file
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pcb(p+"_front.png", p+"_back.png", size-percent: pcb-size-percent)
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}
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#simple-page(
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gen-table-of-contents: true,
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[etc-nand]
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)[
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#section[
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#title[ etc-nand ]
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]
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// #pdf-readability()
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#if is-web {section[
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You can click the PCB images to switch to the other side.
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]}
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#section[
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= Overview
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etc-nand is a real-world #link("https://github.com/ETC-A/etca-spec/")[ ETC.A ] CPU built from almost only quad NAND gate ICs (74hc00)
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It will probably be finished in a few months.
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]
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#section[
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== Estimates
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Estimated gate count:
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- 2800 NAND gates
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- 320 tristate buffers
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#br()
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Estimated component counts:
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- 700x 74hc00 quad NAND gates
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- 40x 74HC54 octal tristate buffers
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- a few simple resistors
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]
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#section[
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== Planned Specifications
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ETC.A base instruction set + byte operations + S&F + Von Neumann
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The CPU will communicate with peripherals over a 16 bit data + 15 bit address memory bus
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]
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#section[
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= Purchase
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You will be able to purchase one in the future.
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Stay tuned!
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]
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#section[
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= Images
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Images of PCBs that are either already manifactured or currently beeing manifactured by JLCPCB.
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]
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#section[
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== 16 bit register
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#context qpcb("reg16")
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]
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#section[
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== 8 bit ALU slice
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A #link(<add8>)[8 bit adder module] will be placed in the middle
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#context qpcb("alu8")
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]
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#section[
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== 8 bit adder <add8>
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#context qpcb("add8")
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]
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]
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